Differences between Dual In-Line Memory Modules: RDIMM vs. LRDIMM
Since the release of Intel’s Sandy Bridge CPUs, servers have had the ability to accept either Registered DIMM (RDIMM) or Load-Reduced DIMM (LRDIMM) modules. There was also Unbuffered DIMM (UDIMM), but it is no longer used because of its lower capacity and bandwidth capabilities.
RDIMM have lower latency
Registered DIMMs use a register on the DIMM to buffer the address and command signals between Dynamic Random-Access Memory modules (DRAM) on the DIMM and memory controller, which allows each memory channel to use up to three dual-rank DIMMs. This improves signal integrity and increases the amount of memory a server can support.
To understand the amount of “ranks” on a DIMM, it is important to understand what a “rank” is. The rank of a DIMM is the amount of 64-bit data that exists on a DIMM. Single rank DIMMs normally have DRAM on one side of the chip, while dual rank DIMMs have DRAM on both sides. It is even possible to have quad rank DIMMs where both sides of the DIMM have two 64-bit DRAM.
RDIMMs with only a single rank typically have higher loaded latency when compared to RDIMMs and LRDIMMs with dual rank. This is due to the inability of single rank modules to parallelize the memory requests from the CPU the way modules with two or more ranks can. Below is a graph detailing the latency differences between RIMMs and LRDIMMs:
DIMM speeds are measured in the amount of Megatransfers per second (MT/s). Faster DIMM speeds allow lower loaded latency. In loaded situations, the increased latency is due to the time that memory requests sit in queue for execution.The faster the DIMM speed, the quicker the memory controller processes the queued commands. Memory running at 2400 MT/s has close to 5% lower loaded latency than memory running at 2133 MT/s.
With DDR4 memory speed and DIMM type being constant, more ranks usually increases the loaded latency. More ranks on the channel allow the memory controller increased capacity to parallelize the handling of memory requests and lower the size of request queues, but it also requires the controller to issue more refresh commands. Even with the increased refresh commands, the greater parallelizing results in a slight net reduction in loaded latencies for two to four ranks on a channel. More than four ranks on a channel shows an increase in loaded latency.
There is no change to the low level read latency on the memory bus when there is increase memory bus utilization. It does cause increased memory latency due to latencies accumulating in the queues within the memory controller.
Memory throughput stays consistent until three DIMMs per Channel (DPC) are used until the DIMM size is increased to 128GB LRDIMMs.
LRDIMMs are capable of larger capacity
Memory buffers are used in LRDIMMs to reduce the electrical loads of the ranks to a single load. This allows up to eight ranks on a single DIMM module. Systems using LRDIMMs can be configured with the largest possible memory. The drawback is increased power usage and higher latencies versus lower capacity RDIMMs.
Number of DIMM Slots
|16||RDIMM||512 GB||16x 32GB Dual-Rank|
|LRDIMM||2048 GB||16x 128 GB Eight-Rank|
|24||RDIMM||768 GB||24x 32 GB Dual-Rank|
|LRDIMM||3072 GB||24x 128 GB Eight-Rank|